SENIOR TEST ENGINEER
CHIPTEST ENGINEERING PRIVATE LIMITED
S$5500 - S$7200
- Responsible in Characterizing of new design across temp and to assess whether the parameter lies with in spec.
- Feasible study of the product and provide a test plan solution for Wafer Sort and Final Test.
- Responsible to debug and root cause the design issue and work with the designer to identify the issue.
- Responsible on analyzing the volume data at FT and WS and provide the spec to screen the device.
- University Engineering Degree in Electrical / Electronic discipline with a basic understanding of electronics engineering fundamentals and circuit analysis
- Knowledge and hands on experience with statistical analysis software package and techniques, quality and reliability testing. Wafer fabrication fundamentals are a plus.
- Solid understanding of electronics engineering fundamentals, digital, analog, mixed-signal, power management and RF circuit analysis techniques
- Working knowledge of Power Management IC (PMIC) measurement techniques such as line/load regulation, PSRR, transition time, power efficiency, jitter, phase noise, etc.
- Expertise in LabView or hands on experience with Teradyne IFlex/UFlex or/and Advantest 93 ATE is a plus.
- Good ASIC device level characterization skills
- Able to work comfortably with lab equipment like Oscilloscopes, Source Meters, Battery Emulators, Spectrum analyzers, etc.
- Strong software skills (VB, Perl, Java, etc.) for writing and debugging test codes.
- Experience in Six Sigma Statistical Process Control
Closing on 03 Mar 2021orview more job listings from this company